Mid/Junior Digital Design engineer

Instigate Semiconductor
Job Address
Application Deadline
Vanadzor, Armenia
- Design of ASIC monitor Core block - Creating RTL to integrate various components (e.g. RiscV CPU, AMBA switch/NOC infrastructure, USB Core,... ) - Timing constraint creation - Block level STA and LEC sign off - Writing detailed design implementation and specification
Required Qualifications
- 3+ years of relevant experience - Familiarity on digital fundamentals and understanding of FPGA/ custom chip flow - Good knowledge of Verilog/SystemVerilog - Experience with UNIX shell scripting and Python scripting - Good analytical and problem solving skills - Good written and verbal communication in English
Application Procedures
Interested candidates should send their CV to hiring@instigatesemiconductor.com email address indicating the position title in the subject line of the email. Please mention in your application that you have learned about this position from MyJob.am
Additional Information
Instigate Semiconductor CJSC recruits Mid/Junior Digital Design Engineer in Vanadzor. A package of benefits including medical insurance. Salary: 400000 AMD - 900000 AMD Net a month